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Objectives

The first test item to be implemented to verify electrical connectivity. It focuses on detecting opens or shorts, particularly between power and ground pins, before proceeding with functional tests. Additionally, it identifies shorts between different power rails and adjacent pins to ensure proper circuit integrity and avoid damage during subsequent testing.

Test Methodology
Pre-Test Preparation
  • Obtain the ESD diagram from the designer or the foundry.
  • Ensure that all relays are connected to the DUT and that no resistors are present in the middle of the signal line. Additionally, verify any common signals shared across multiple sites.
  • Perform a positive-direction diode check to the power pins (FIMV)
  1. GND pins are hardwired to DUT pins when designed. 
  2. Program all VDD pins to 0V.
  3. Leave all other pins open (Hi-Z).
  4. Force +100 µA from an ATE digital pin and measure the voltage drop, which will depend on the ESD diode and is typically around 0.7V.
  5. Repeat this process for all the other digital pins.
  • Perform a negative-direction diode check to the ground pins (FIMV)
  1. GND pins are hardwired to DUT pins when designed.
  2. Leave all VDD pins open and all other pins are open in a high-impedance (Hi-Z) state.
    Advantages: This prevents unintended current paths through powered circuits or reverse leakage through other components, ensuring only ESD testing is performed.
  3. Force -100 µA from an ATE digital pin and measure the voltage drop, which will depend on the ESD diode and is typically around -0.7V.
  4. Repeat this process for all the other digital pins.